The disclosed embodiments of the invention relate to signal processing, and more particularly, to a truncation circuit for a voltage-controlled oscillator (VCO)-based continuous-time sigma-delta modulator (CTSDM).
The VCO-based quantizer (VCOQ) of a VCO-based CTSDM provides a bonus integrator and time domain fine quantization. As the Vdd and the process scale down, the VCO can oscillate faster and provide more phases. Therefore, using the VCOQ in the VCO-based CTSDM can boost the quantizer bit number. In a typical VCO-based CTSDM, the output of the quantizer must be fed back to an analog-to-digital converter (ADC) input summing node as soon as possible. The quantizer requires time (usually half a clock cycle), however, to resolve the analog input data and avoid meta-stability issues. To counter this extra delay, excess loop delay compensation (ELDC) must be applied at the quantizer input as a short cut.
Although VCOQ can provide a quantization bit number up to 7 bits or more, the output is purely thermometer code, and the routing bus and layout of unary digital-to-analog converter (DAC) cells could be overwhelming. In practice, truncation of VCOQ output can reduce DAC complexity. Conventional truncation circuits need to first perform thermometer-to-binary conversion and then perform binary-to-thermometer conversion after signal processing, which erodes the feedback timing budget. A novel scheme is required to get over this bottleneck.